Supermicro 5013S-8 Instrukcja Użytkownika Pobierz pdf (Strona 14)

SUPERSERVER 5013S-8/5013S-i Manual

1-4

1-3 Mainboard Features

At the heart of the SuperServer 5013S-8/5013S-i lies the X5SS8-GM/

X5SSE-GM, a single Xeon processor motherboard designed to provide maxi-

mum performance. Below are the main features of the X5SS8-GM/X5SSE-

GM.

Chipset Overview

ServerWorks Grand Champion SL chipset, comprised of a North Bridge

(CMIC-SL) and a South Bridge (CSB6).

North Bridge (CMIC-SL)

The North Bridge interfaces directly to the processors via a 533/400 MHz

Host bus and integrates the functions of the main memory subsystem and

the IMB bus interface unit. The memory subsystem consists of a 4 DIMM

configuration accessed over a 266 MHz memory bus at a peak bandwidth

of 1.6 GB/sec.

South Bridge (CSB6)

The South Bridge provides various integrated functions, including the PCI

bridge and support for UDMA100, security (passwords and system protec-

tion), Plug & Play, USBs, power management, interrupt controllers and the

LPC Bus.

Processors

The X5SS8-GM/X5SSE-GM supports single 604 and 603-pin Intel Xeon

processors of up to at 3.06 GHz at a front side (system) bus speeds of 533

and 400 MHz. Please refer to the support section of our web site for a

complete listing of supported processors (http://www.supermicro.com/

TechSupport.htm).

Memory

The X5SS8-GM/X5SSE-GM has four (4) 168-pin DIMM sockets that can sup-

port up to 4 GB of registered ECC DDR-266/200 low-profile SDRAM mod-

ules. Module sizes of 128 MB, 256 MB, 512 MB and 1 GB may be used to

populate the DIMM slots.

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